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rev.2.00 jun. 25, 2004 page 1 of 10 HD74LV373A octal d-type transparent latches with 3-state outputs rej03d0331?0200z (previous ade-205-274 (z)) rev.2.00 jun. 25, 2004 description the HD74LV373A has eight d type latches with three state outputs in a 20 pin package. when the latch enables input is high, the q outputs will follow the d inputs. when the latc h enables goes low, data at the d inputs will be retained at the outputs until latch enable returns high again. when a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. features ? v cc = 2.0 v to 5.5 v operation ? all inputs v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) ? all outputs v o (max.) = 5.5 v (@v cc = 0 v) ? typical v ol ground bounce < 0.8 v (@v cc = 3.3 v, ta = 25c) ? typical v oh undershoot > 2.3 v (@v cc = 3.3 v, ta = 25c) ? output current 8 ma (@v cc = 3.0 v to 3.6 v), 16 ma (@v cc = 4.5 v to 5.5 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) HD74LV373Afpel sop?20 pin (jeita) fp?20dav fp el (2,000 pcs/reel) HD74LV373Arpel sop?20 pin (jedec) fp?20dbv rp el (1,000 pcs/reel) HD74LV373Atell tssop?20 pin ttp?20dav t ell (2,000 pcs/reel) note: please consult the sales office for the above package availability. function table inputs oe le d output q hxxz lhll lhhh llxq 0 note: h: high level l: low level x: immaterial z: high impedance q 0 : output level before the indicated steady state input conditions were established.
HD74LV373A rev.2.00 jun. 25, 2004 page 2 of 10 pin arrangement 17 18 15 16 19 20 11 12 13 14 v cc 8q 8d 7d 7q 6q 1 2 3 4 5 6 7 8 9 10 oe 1q 1d 2d 2q 3q 3d gnd 4d 4q 6d 5d 5q le (top view) absolute maximum ratings item symbol ratings unit conditions supply voltage range v cc ?0.5 to 7.0 v input voltage range* 1 v i ?0.5 to 7.0 v ?0.5 to v cc + 0.5 output: h or l output voltage range* 1, 2 v o ?0.5 to 7.0 v v cc : off or output: z input clamp current i ik ?20 ma v i < 0 output clamp current i ok 50 ma v o < 0 or v o > v cc continuous output current i o 35 ma v o = 0 to v cc continuous current through v cc or gnd i cc or i gnd 70 ma 835 sop maximum power dissipation at ta = 25c (in still air)* 3 p t 757 mw tssop storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 5.5 v maximum. 3. the maximum package power dissipation was calculated using a junction temperature of 150c.
HD74LV373A rev.2.00 jun. 25, 2004 page 3 of 10 recommended operating conditions item symbol min max unit conditions supply voltage range v cc 2.0 5.5 v input voltage range v i 05.5v 0v cc h or l output voltage range v o 05.5 v high impedance state ? ?50 av cc = 2.0 v ??2 v cc = 2.3 to 2.7 v ??8 v cc = 3.0 to 3.6 v i oh ? ?16 ma v cc = 4.5 to 5.5 v ?50 av cc = 2.0 v ?2 v cc = 2.3 to 2.7 v ?8 v cc = 3.0 to 3.6 v output current i ol ?16 ma v cc = 4.5 to 5.5 v 0 200 v cc = 2.3 to 2.7 v 0 100 v cc = 3.0 to 3.6 v input transition rise or fall rate ? t / ? v 020 ns/v v cc = 4.5 to 5.5 v operating free-air temperature ta ?40 85 c note: unused or floating inputs must be held high or low. logic diagram to seven other channels o e 1d 1q 3 1 2 11 le c1 1d
HD74LV373A rev.2.00 jun. 25, 2004 page 4 of 10 dc electrical characteristics ta = ?40 to 85c item symbol v cc (v) * min typ max unit test conditions 2.0 1.5 ? ? 2.3 to 2.7 v cc 0.7 ? ? 3.0 to 3.6 v cc 0.7 ? ? v ih 4.5 to 5.5 v cc 0.7 ? ? 2.0 ? ? 0.5 2.3 to 2.7 ? ? v cc 0.3 3.0 to 3.6 ? ? v cc 0.3 input voltage v il 4.5 to 5.5 ? ? v cc 0.3 v min to max v cc ? 0.1 ? ? i oh = ?50 a 2.3 2.0 ? ? i oh = ?2 ma 3.0 2.48 ? ? i oh = ?8 ma v oh 4.5 3.8 ? ? i oh = ?16 ma min to max ? ? 0.1 i ol = 50 a 2.3 ? ? 0.4 i ol = 2 ma 3.0 ? ? 0.44 i ol = 8 ma output voltage v ol 4.5 ? ? 0.55 v i ol = 16 ma input current i in 0 to 5.5 ? ? 1 av in = 5.5 v or gnd off-state output current i oz 5.5 ? ? 5 av o = v cc or gnd quiescent supply current i cc 5.5 ? ? 20 av in = v cc or gnd, i o = 0 output leakage current i off 0??5 av i or v o = 0 to 5.5 v input capacitance c in 3.3 ? 2.9 ? pf v i = v cc or gnd note: for conditions shown as min or max, use the appr opriate values under recommended operating conditions.
HD74LV373A rev.2.00 jun. 25, 2004 page 5 of 10 switching characteristics v cc = 2.5 0.2 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 8.3 15.2 1.0 17.0 d ? 9.1 15.7 1.0 19.0 c l = 15 pf le ? 10.4 18.0 1.0 21.0 d propagation delay time t plh t phl ? 11.1 18.6 1.0 22.0 ns c l = 50 pf le q ? 8.9 15.8 1.0 19.0 c l = 15 pf enable time t zh t zl ? 10.9 18.8 1.0 22.0 ns c l = 50 pf oe q ? 6.2 12.6 1.0 15.0 c l = 15 pf disable time t hz t lz ? 8.3 17.4 1.0 19.0 ns c l = 50 pf oe q setup time t su 4.5 ? ? 5.0 ? ns data before le hold time t h 1.5 ? ? 1.5 ? ns data after le pulse width t w 6.0 ? ? 6.5 ? ns le "h" v cc = 3.3 0.3 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 5.8 11.4 1.0 13.5 d ? 6.4 11.0 1.0 13.0 c l = 15 pf le ? 7.3 14.9 1.0 17.0 d propagation delay time t plh t phl ? 7.8 14.5 1.0 16.5 ns c l = 50 pf le q ? 6.3 11.4 1.0 13.5 c l = 15 pf enable time t zh t zl ? 7.7 14.9 1.0 17.0 ns c l = 50 pf oe q ? 4.7 10.0 1.0 12.0 c l = 15 pf disable time t hz t lz ? 6.0 13.2 1.0 15.0 ns c l = 50 pf oe q setup time t su 4.0 ? ? 4.0 ? ns data before le hold time t h 1.0 ? ? 1.0 ? ns data after le pulse width t w 5.0 ? ? 5.0 ? ns le "h" v cc = 5.0 0.5 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 4.1 7.2 1.0 8.5 d ? 4.5 7.2 1.0 8.5 c l = 15 pf le ? 5.1 9.2 1.0 10.5 d propagation delay time t plh t phl ? 5.5 9.2 1.0 10.5 ns c l = 50 pf le q ? 4.5 8.1 1.0 9.5 c l = 15 pf enable time t zh t zl ? 5.5 10.1 1.0 11.5 ns c l = 50 pf oe q ? 3.3 7.2 1.0 8.5 c l = 15 pf disable time t hz t lz ? 4.0 9.2 1.0 10.5 ns c l = 50 pf oe q setup time t su 4.0 ? ? 4.0 ? ns data before le hold time t h 1.0 ? ? 1.0 ? ns data after le pulse width t w 5.0 ? ? 5.0 ? ns le "h"
HD74LV373A rev.2.00 jun. 25, 2004 page 6 of 10 output-skew characteristics c l = 50 pf ta = 25c ta = ?40 to 85c item symbol v cc = (v) min max min max unit 2.3 to 2.7 ? 2.0 ? 2.0 3.0 to 3.6 ? 1.5 ? 1.5 output skew t sk (o) 4.5 to 5.5 ? 1.0 ? 1.0 ns note: skew between any outputs of the same package switchi ng in the same direction. this parameter is warranted but not production tested. operating characteristics c l = 50 pf ta = 25c item symbol v cc = (v) min typ max unit test conditions 3.3 ? 16.6 ? power dissipation capacitance c pd 5.0 ? 18.2 ? pf f = 10 mhz noise characteristics c l = 50 pf ta = 25c item symbol v cc = (v) min typ max unit test conditions quiet output, maximum dynamic v ol v ol (p) 3.3 ? 0.6 0.8 v quiet output, minimum dynamic v ol v ol (v) 3.3 ? ?0.6 ?0.8 v quiet output, minimum dynamic v oh v oh (v) 3.3 ? 2.9 ? v high-level dynamic input voltage v ih (d) 3.3 2.31??v low-level dynamic input voltage v il (d) 3.3 ? ? 0.99 v test circuit open gnd c 1 k ? v cc v cc s2 l output test s2 t /t plh phl open gnd t /t zh hz t /t zl lz note: c includes the probe and jig capacitance. l
HD74LV373A rev.2.00 jun. 25, 2004 page 7 of 10 input le gnd t plh 10% 90% t r t f 10% 10% t r 90% 10% t f gnd t phl v oh v cc v cc v cc v cc v cc v cc 50%v cc v ref 50%v cc 50%v cc 50%v cc 50%v cc v ref 50%v cc 50%v cc 50% v cc 50% v cc v ref v ol t plh t phl gnd gnd v oh v ol t w t su t h gnd gnd t r 90% 10% input d output q input le input d output q input le input d t r 90% 10% t f 90% 10% t r 90% 90% 10% t f 10% 90% 90% ? waveform ? 1 ? waveform ? 2 ? waveform ? 3
HD74LV373A rev.2.00 jun. 25, 2004 page 8 of 10 v ? 0.3 v oh v + 0.3 v ol t zl t lz t zh t hz t f t r 90% 10% 90% 10% v oh v ol gnd input oe waveform ? a waveform ? b v cc 50%v cc 50%v cc 50%v cc 50%v cc v cc ov ? waveform ? 4 1. t r 3 ns, t f 3 ns 2. input waveform: prr 1 mhz, duty cycle 50% 3. waveform ? a is for an output with internal conditions such that the output is low except when disabled by the output control. 4. waveform ? b is for an output with internal conditions such that the output is high except when disabled by the output control. notes:
HD74LV373A rev.2.00 jun. 25, 2004 page 9 of 10 package dimensions package code jedec jeita mass (reference value) fp?20dav ? conforms 0.31 g *pd plating *0.40 0.06 0.12 0.15 m 20 10 1 *0.20 0.05 0.80 max 11 12.6 5.5 2.20 max 13 max 0 ? ? 8 ? 0.70 0.20 + 0.20 ? 0.30 7.80 1.27 0.10 0.10 1.15 as of january, 2002 unit: mm package code jedec jeita mass (reference value) fp-20dbv conforms ? 0.52 g *ni/pd/au plating 0.12 0.15 0 ? ? 8 ? m 20 11 0.20 0.10 1 1.27 10 12.8 13.2 max 7.50 2.65 max *0.25 0.05 *0.40 0.06 + 0.57 ? 0.30 0.70 + 0.25 ? 0.40 10.40 1.45 0.935 max as of january, 2003 unit: mm
HD74LV373A rev.2.00 jun. 25, 2004 page 10 of 10 package code jedec jeita mass (reference value) ttp?20dav ? ? 0.07 g *pd plating 0.50 0.10 0? ? 8? *0.15 0.05 6.40 0.20 0.10 1.10 max 0.13 m 0.65 110 20 11 4.40 6.50 6.80 max *0.20 0.05 0.07 +0.03 ?0.04 1.0 0.65 max as of january, 2002 unit: mm
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